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Allows external devices to be controlled via the Serial Peripheral Interface (SPI) bus.
The WebCell can be configured to be an SPI bus master. Pin B5 is Master Out Slave In (MOSI), pin B6 is Master In Slave Out (MISO), and pin B7 is the Serial Clock (SCK).
One or more slave SPI devices can be connected to this bus, each with their own Slave Select (SS) signal. Any of the other general-purpose I/O pins of the WebCell (A0 - A7, B0 - B4) may be used as the SS pin for a slave. The SS pin may be controlled automatically by the WebCell or manually using operations on PortA/PortB.
The SPI bus is enabled by setting the bitRate property to a positive value. Setting the bitRate property to zero disables the SPI bus and allows the corresponding pins to be used for other functions. The maximum value that can be assigned to the bitRate property is approximately 16 MHz.
The SPI bus has several additional parameters that can be configured using the config property. These are: effective clock edge and polarity (SPI mode); which bit of the byte is sent first; and which pin to use for SS, or if SS is managed manually. The config property is a single byte which sets all these parameters.
A data transfer operation is called a transaction. A transaction begins when the SS pin of a specific slave device is pulled low, and ends when the pin returns high. When using automatic control of the SS pin, a transaction corresponds to one call to the writeRead function. The writeRead function can write a number of bytes, read a number of bytes, or write bytes then read bytes. If you wish to perform a different combination of transfers during a transaction, you will need to control the SS pin manually and make multiple calls to the writeRead function.
Theoretically, the SPI bus allows full-duplex (simultaneous two-way) data transfers. However, in practice this feature is rarely used and is not supported by the WebCell.